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Using MemoryBarrier() for CPUs not supporting SSE2
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@ -35,6 +35,9 @@
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#elif defined(_MSC_VER)
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#include <intrin.h>
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#define WIN32_LEAN_AND_MEAN
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#include <windows.h>
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inline unsigned atomic_inc(volatile unsigned *pValue)
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{
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return _InterlockedIncrement((volatile long *)pValue);
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@ -52,7 +55,7 @@
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inline void sync_barrier()
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{
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_mm_mfence();
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MemoryBarrier();
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}
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#else
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#error missing atomic implementation for this compiler
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@ -7,7 +7,6 @@
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#include <base/math.h>
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#include <base/system.h>
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#include <base/tl/threading.h>
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#include <engine/client.h>
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#include <engine/config.h>
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